Movellus Partners with Synopsys to Deliver Power Efficiency for Next Generation IC’s

SANTA CLARA, Calif., March 11 (Bernama) -- Movellus announced the inclusion of its clocking technology in the Synopsys Silicon Lifecycle Management (SLM) IP portfolio, directly addressing power challenges facing complex chips in the age of AI. The Synopsys SLM Advanced Clock Generator (“ACG”) IP serves as the foundation for real-time power optimization, enabling power architects to dynamically adapt SoC profiles to environmental and workload changes optimizing performance and power. The OEM relationship expands customer access to Movellus’ adaptive clocking technology through Synopsys’ channels.

“As AI and hyperscale workloads push the boundaries of semiconductor complexity, managing power optimization and power integrity has become a key challenge our customers " said Steve Pateras, vice president of SLM product management at Synopsys. "By integrating Movellus' innovative technology into our Silicon Lifecycle Management portfolio, we are providing power architects with a sophisticated, real-time solution to optimize power efficiency.”